SC16 Conference — Enyx is pleased to announce the 25G version of its enterprise-class TCP/IP, UDP/IP and MAC Intellectual Property (IP) Cores for FPGAs and SoCs. This new edition is presented on the high-performance BittWare XUPP3R PCIe board, which features a VU9P FPGA from Xilinx’s new top-of-the-line 16nm UltraScale+ family.
Enyx, a world-class pioneer in ultra-low latency FPGA-based technology and solutions, has released 25G Ethernet connectivity for its IP Cores to address the growing throughput needs of the datacenter space, opening the road to future 50G and 100G implementations. TCP offload engines are key to sustaining high throughput and computational demanding applications which are becoming a real challenge for standard CPUs. Enyx IP Cores perform network protocols offloading in dedicated hardware, including network security enabled NICs, Smart NICs, custom packet filtering switches and high bandwidth bridges.
Enyx IP Cores allow soft-hardware developers to easily and quickly implement network connectivity in their FPGA and SoC enabled projects. In addition, Enyx IP Cores are also offered to non-soft-hardware developers through Enyx Design Services as part of a complete and customized Smart NIC or Smart Switch solution. End customer profile industries range from high performance computing, defense, aeronautics and aerospace to hedge funds and top-tier investment banks.
“Adoption of the new 25G Ethernet network connectivity in the datacenter space has made hardware offload more and more important to keep up with processing an increasing volume of data in real-time. We are more than confident that our network protocols offload technology running at 25G and beyond will help the datacenter and network industry meet these new challenges,” said Eric Rovira Ricard, VP Business Development in charge of the Technology/IP branch at Enyx.
“We are pleased to see Enyx quickly take advantage of our latest Xilinx 16nm FPGA boards, bringing a robust ultra-low latency 25G solution and paving the way to 50/100G. Our partnership with Enyx is a valued one as our companies share a focus on the highest performance solutions for the most demanding applications and industries,” said Ron Huizen, VP Horizontal Products at BittWare.
Enyx nxTCP and nxUDP IP Cores feature full RTL Layers 2, 3, 4 implementations with integrated 25G/10G/1G MAC, compliant with the IEEE 802.3 standards, supporting ARP, IPv4, ICMP, IGMP and TCP/UDP protocols, aim to reduce latency while offloading the server CPU from TCP/UDP network management. nxTCP and nxUDP are architected to work seamlessly on Intel FPGA (formerly Altera) and Xilinx FPGA and SoC designs.
Enyx nxTCP 25G TCP and MAC implementation on Xilinx Virtex UltraScale+ VU9P devices features latencies of 194.56 ns in transmission and 199.68 ns in reception, and supports a line rate packet processing performance of 37 million packets per second.
BittWare’s XUPP3R is the first commercially available PCIe board supporting the 16nm Xilinx UltraScale+ family of FPGAs. The 3/4-length board has four QSFP28 cages, each of which support 10/25/40/100 GbE, and can be combined for 400 GbE. Two PCIe Gen3 x16 interfaces are provided. Memory options include up to 256 GBytes of DDR4 SDRAM. The XUPP3R is designed for ultra-high bandwidth and systems demanding processing of massive data flows. BittWare is a certified board partner of Enyx.
Enyx IP Cores are available as a downloadable package from the Enyx website, and starting in December 2016, the 25G version package will be available including a reference design for BittWare’s XUPP3R PCIe board.
Enyx IP Cores can be purchased directly from Enyx or from certified distributors, and include a variety of integration examples and reference designs for Enyx certified board partners.
Enyx made this announcement today at the SC16 conference at Salt Lake City, where it is currently presenting its technology product line and services.
With Business Wire
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