A promising HPC User Forum

By Frédéric Milliot | August 14, 2014

We now have the complete list of presentations and speakers for the September 15-17 HPC User Forum at the Grand Hyatt Seattle (WA) – a list that makes this forthcoming edition quite promising.

Judge by yourself:

Update on NERSC-8 Procurement and Plans – Jay Srinivasan, NERSC
Bits, Bytes and BTUs: Warm Water Liquid Cooling at NREL – Steven Hammond, NREL
Future HPC Architecture Possibilities – Rob Leland, Sandia National Laboratories
P&G-University of Cincinnati HPC Collaboration – Fred Murrell, Procter & Gamble
Ready for Takeoff or Preparing for a Soft Landing: HPC at HLRS and in Germany – Michael Resch, HLRS/University of Stuttgart
Results of Study Comparing Liquid Cooling Methods – Jon Summers, University of Leeds (UK)
Building Scalable Technologies for Semantic Analysis – John Feo, Pacific Northwest National Laboratory
Update on HPC at PayPal – Arno Kolster and Ryan Quick, PayPal
HPC in the Life Sciences – Jack Collins, National Cancer Institute
Update on Trinity System Procurement and Plans – Manuel Vigil, Los Alamos National Laboratory
Real-Time Geospatial Rendering Project – Amit Vij and Nima Neghaban, GIS Federal
Commercial Firms Exploiting Multi-Cluster Grids for HPC – Charlotte Crain, SAS
HPC Use in Genomic Pediatric Medicine – Shane Corder, Children’s Mercy Hospital & Clinics
Google from an HPC Perspective – Ron Minnich, Google
Update on HPC in Poland, Marek Niezgódka – ICM/University of Warsaw
New Developments in HPC Cloud Computing – Tim Carroll, Cycle Computing
Update on HPC Use on AWS – David Pellerin, AWS
Update on IBM-Lenovo Deal – Brian Connors, IBM
Industrial achievements on Blue Waters using CPUs and GPUs – Seid Koric, NCSA
Development of Intel MIC Codes in NWChem – Edoardo Apra, Pacific Northwest National Laboratory
Experiences Using Intel Phi Coprocessors – Troy Porter, Stanford University
Experiences Using Accelerators at ORNL – Doug Kothe, ORNL
Initial Experiences Programming Xilinx Virtex-6 FPGAs Inside Convey’s HC01ex – Stephen Bique, Naval Research Laboratory
A new type of programmable accelerators for HPC applications – Jan van Lunteren, IBM Research Labs, Zurich
Advancing Science In Alternative Energy And Bioengineering With Many-Core Processors And Accelerators – Michael Brown, Intel
Use of Many-Core Processors with the Berkeley GW Code – Jack Deslippe, Lawrence Berkeley National Laboratory
Multiphase Flow Modeling and Simulation: HPC-Enabled Capabilities Today and Tomorrow – Igor Bolotnov, North Carolina State University
HPC Market Update and IDC’s Top Growth Areas for 2014 and Beyond – Earl Joseph, Steve Conway and Chirag Dekate